Products

DESCRIPTION

Basic Info.

Model NO.	CY600R
Shape	DIP
Frequency	300MHz ~ 450MHz
Sensitivity	-114dBm
Data Rate	up to 10kbps
Current	4.3~4.6mA
Voltage	2.4~5.5V
Ambient Temperature	-40° C to 85° C
Packaging	Ssop16
Lead Time	3 Weeks After Receiving Payment
Ship by	DHL/FedEx/UPS
MOQ	100PCS
Transport Package	Reel
Trademark	CY
Origin	China
HS Code	8542399000
Production Capacity	200000PCS/Year

Product Description

General Description

The CY600R is a fully integrated OOK/ASK receiver for the 315 / 433.92 MHz frequency bands requiring few external components. The CY600R receiver chain consists of a low-noise amplifier (LNA), image-rejection mixer (IRM), built-in channel-select filter (CSF), OOK/ASK demodulator, data filter, and data slicing comparator. The local oscillator (LO) sub-system incorporates a monolithic VCO, ÷ 32 feedback divider, loop filter and fast start-up reference oscillator to form a complete phase-locked loop-based frequency synthesizer for single channel applications. The CY600R also includes an on-chip voltage regulator.The CY600R is available in a 16-pin SSOP.

Features

1. Covers 315 and 433.92 MHz frequency bands
2. Low power consumption: 4.3 mA for 315 MHz band and 4.6 mA for 433.92 MHz band under normal operating conditions
3. Requires few external components
4. Achieves excellent sensitivity on the order of -114 dBm for 315 MHz band and -114 dBm for 433.92 MHz band (peak ASK signal level)
5. Supply voltage range: 2.4 to 5.5 V
6. Supports data rates up to 10 Kb/s
7. Wide input dynamic range with automatic gain control handling

Applications

1. Automotive Remote Keyless Entry (RKE)
2. Remote control
3. Garage door and gate openers
4. Suitable for applications that must adhere to either the European ETSI-300-220 or the North American FCC (Part 15) regulatory standards

Pin Configuration

Pin Description

Pin No.	Pin Name	I/O	Description
1	VSSLO	G	Ground for LO sub-system
2	VSSRF	G	Ground for RF front-end
3	ANT	I	RF input connected to antenna via a matching network
4	VRF	P	Supply voltage for RF front-end
5	VBB	P	Supply voltage for baseband chain
6	AGCDIS	I	AGC control pin (tie LOW to enable AGC)
7	FDIV	I	RF frequency band select
8	VDD5	P	5 V regulator input
9	VSSBB	G	Ground for baseband chain
10	SELB	I	Data filter bandwidth select (pin B)
11	SELA	I	Data filter bandwidth select (pin A)
12	CE	I	Chip enable (tie HIGH to enable the chip)
13	DO	O	Data output
14	CTH	I/O	Connection for data slicing threshold capacitor
15	VLO	P	Supply voltage for LO sub-system
16	REFOSC	I	Reference oscillator input